Le processus a pris 1 jour. J'ai passé un entretien chez Intel Corporation (Folsom, CA) en févr. 2012
Entretien
I was called onsite for the interview. The hiring manger was very friendly and made me comfortable from the very begining. He also offered me coffee. These are the few questions which he asked me -
1. how to minimize a boolean expression
2. k-map optimization
3. how to divide a frequency
4. draw a divide by 2 counter,divide by 4 counter
5.timing diagrams of the counters.
6.master-slave flip-flop
7.setup time,hold time definitions, violations, and how to fix them
8.verilog- diffrnce b/w blocking and non-blocking,design a D Flipflop
Questions d'entretien [1]
Question 1
How to fix the hold-time violation after the chip was fabricated?
J'ai passé un entretien chez Intel Corporation (Santa Clara, CA)
Entretien
Questions on physical design concepts , syn and apr
Sta questions about constraints
Concepts of transistor physics
Phone screen, multiple round, followed by conversation with the hiring manager
Overall good experience
J'ai passé un entretien chez Intel Corporation (Chandler, AZ)
Entretien
Five engineers, a manager and director asked medium level engineering and architecture questions including proof of structured coding and design skills. Each interviewer had varying questions. They rated at 0 (won’t work with candidate), 1 (adequate) or 2 (exceptional hire) for a team survey of votes to compare multiple candidates.
Questions d'entretien [1]
Question 1
Design a state machine to control a four way intersection of varying time traffic lights.
long but effective. 4 rounds of interviews ( quiz questions, computer architecture, past projects, leadership experience, basic algorithm questions, coding, etc.) each last 40 min. results came back after 10 days