Le processus a pris 1 jour. J'ai passé un entretien chez Intel Corporation en nov. 2011
Entretien
It was a phone interview for Back-end Hardware Engineer. I didn't have any into about the interviewer and thought he was an internal recruiter. It turned out he was the engineering manager and the interview was technical. It covered circuit design, setup and hold time, sizing, speed and power of transistors, buffer delay, wire delays, finite state machine, latch and flip-flop, blocking and non-blocking Verilog statements, low threshold and high threshold voltage libraries.
Questions d'entretien [2]
Question 1
If hold time is 0, will there be any hold time violation? Why?
J'ai passé un entretien chez Intel Corporation (Guadalajara, Jalisco)
Entretien
Largo, cansado, solo si tienes conexiones en Intel te llaman, el proceso es largo, las preguntas técnicas son fáciles, sin embargo si eres de otro estado tus posibilidades de ser contratado bajan
The interview started with a short introduction about myself. The interviewer then explained the role and the responsibilities. They asked me to describe my final project in detail and followed with a few technical questions.
Questions d'entretien [1]
Question 1
Can you walk me through your final project and explain the main technical challenges you handled?
In very much details. Block diagram and code.
J'ai passé un entretien chez Intel Corporation (Heredia)
Entretien
Apply through the web site, answer some questions about experience and knowledge of Verita in tools.
After that you get an email asking for some more information (availability and such). Next it’s a short phone call to verify your English level.
After that there’s a technical interview and then a final interview
Questions d'entretien [1]
Question 1
Had to create a flip-flop with asynchronous and other with synchronous reset using system verilog