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      Entretien pour Associate Engineer

      4 juill. 2017
      Employé (anonyme)
      Rānchī
      Offre acceptée
      Expérience positive
      Entretien difficile

      Candidature

      J'ai postulé via un établissement d'enseignement supérieur ou universitaire. J'ai passé un entretien chez Qualcomm (Rānchī) en déc. 2016

      Entretien

      Qualcomm India Private Limited (QIPL or QC India) was provided a Dream Status of Recruitment at BIT Mesra, owing to its Attractive Compensation Package and Tremendous Reputation in the Semiconductor Industry. Qualcomm India conducted a Well-Organised Campus Recruitment Process, which comprised of the following steps: PRELIMINARY ROUNDS: Initial Shortlisting on the Basis of CGPA & Resume: Depending on the Highest CGPA of the Batch & Branch, Qualcomm fixes its CGPA Cut-Off which was 7.5 for BIT Mesra. The Resumes of Interested Applicants were provided to the Recruiter for an Initial Screening however, there were no such cases of elimination coming up in this step. Out of 114 applicants from the branches of CSE, ECE, EEE and IT, 98 students were declared eligible for taking the OT, strictly on the basis of the CGPA Cut-Off decided earlier (Selection Ration >= 90%). ONLINE ROUND: Platform: HirePro The Online Test (OT) is designed in a scientific manner, where you have to select your Area of Specialisation in the beginning itself. The choices provided were: (1) Electronics (2) Communication (3) Software The OT is again divided into three sections viz. (1) Basic Aptitude & Mathematical Reasoning (2) Coding Fundamentals (3) Area of Specialisation opted for at the beginning Each Section Comprises of 20 MCQ Questions and the time allotted per section is 25 Minutes. You have to take up the above sections in the order mentioned above, you don’t have the provision to switch between two sections here. There is a buffer time available on completion of each section, which is on the candidate, it is never advised hence to rush into the next section when you finish one. The details of the questions faced in the individual sections are as follows: (1) Basic Aptitude & Mathematical Reasoning: The Aptitude Section comprises of CAT or Higher Level Questions. All the questions are significantly time-consuming, hence it is advised to skip a lengthy question and jump to the relatively simple ones, which will give you a fair idea of the entire paper at the beginning. Solving questions on Data Interpretation, Probability, Profit and Loss, Mensuration etc. will be helpful. Students consume most of the allotted time in solving the DI questions, which can be improved with practice. (2) Coding Fundamentals: This section comprised of basic C Programming Questions, Questions on Basic OOPS Concepts, Microprocessor Based Questions, Questions on Computer Networking and Boolean Algebra. Greater focus in this section was on input-output based questions rather than writing chunks of code. This section is relatively easy and less time consuming, fairly depending on your knowledge of the above topics. (3) Area of Specialisation selected at the beginning: I had chosen for Electronics as my Area of Specialisation. Questions in this section were fairly simple, straight from the GATE Preparation Archives, demanding strong understanding of Courses like Basic Electronics, Digital Electronics, Semiconductor Theory and VLSI Design. This section might seem to be tight on time on two conditions, one if you are not confident on your solving approach or you are out of practice.

      Questions d'entretien [1]

      Question 1

      TECHNICAL INTERVIEWS: Out of 99 students appearing for the OT, 33 odd students were called for the Technical Interview Round (Selection Ratio >= 30%). The students appearing for the Technical Interviews were again segregated into three categories, basis their Area of Specialisation. Generally, the Interview Process comprises of two Technical Discussion Rounds which may extend to three followed by an HR Round if you get through convincingly. Unlike Regular Interviews, QC Interviews are intriguingly technical, and don’t start off with “Introduce Yourself” questions. The Interview started with listing down my subjects of comfort. As my profile mostly comprised of projects and internships aligned to VLSI Design, the conversations mostly emphasised on testing my basic concepts of CMOS Circuits. The important questions I faced in my first round were as follows: ROUND 1 DESCRIPTION: Q1: Design NAND Gate using 2:1 MUX. Draw a 2 i/p AND Gate using XOR gates. Q2: Draw a Binary to Gray Code Converter. Explain the steps followed. What are the advantages with Excess 3 Coding? Q3: Questions on Flip-Flop Conversion. Explain the difference between Moore and Mealy State Models. Q4: Explain the Concept of Small Signal Analysis. How are MOSFETS used as Inverters and Amplifiers? Q5: Explain CLM in MOSFETs. Write down the relation between Threshold Voltage & Source to Body Bias. Q6: Explain DIBL, is it good or bad? Q7: What are various power losses in digital ICs and CMOS? Q8: Explain Dynamic Switching Power Losses in context to Digital ICs. Explain other power losses if you know them. How do you minimise Dynamic Switching Power Loss? After an hour-long discussion on the above topics, I was taken into Communication Engineering, Software Applications & Embedded Systems. Questions were mostly from Digital Signal Processing, Analog & Digital Communication Systems in my second round. ROUND 2 DESCRIPTION: Q1: What is Bit Interleaving? Explain the conventional techniques used for Bit Interleaving. Q2: Draw the Constellation Diagram for QPSK Modulation. Is this diagram the most optimised one? (Relate to Probability of Error) Q3: What is the Multiplication Property of Fourier Transform? Draw the Fourier Transform of Rect, Sinc and Triangle Waveforms. Q4: Write down the Properties of Dirac Delta Function Q5: What are the Characteristics of Super-Heterodyne Receiver? Q6: Draw and explain the Block Diagram for QAM System. Define Signal. What are the conditions for Stability & Causality of Signals? Q7: Derive the Shannon’s Channel Capacity Theorem. Is it possible to achieve infinite data rate? Q8: What are the differences between Sampling & Quantization? Why is Sampling followed by Quantization and not the other way round? Q9: Compare FIR and IIR Filters. What is a Linear Phase FIR Filter? Q10: What are the various search algorithms you are aware of? Explain the Binary Search Algorithm. ROUND 3 DESCRIPTION: The Technical Discussion Rounds were followed by an HR Discussion. We discussed more on the Job Profile being offered. It was a very satisfying process for me, with 12 selections from BIT Mesra (Selection Ratio >= 30%).
      1 réponse
      4

      Autres retours d’entretien d’embauche pour un poste comme Associate Engineer chez Qualcomm

      Entretien pour Associate Engineer

      11 nov. 2024
      Candidat à l'entretien anonyme
      Hyderâbâd
      Aucune offre
      Expérience positive
      Entretien facile

      Candidature

      J'ai passé un entretien chez Qualcomm (Hyderâbâd)

      Entretien

      The first round was MCQ 60 questions 90 min After this round, I got a call from the company about the interview interview consists of 2 rounds in both rounds, they asked about DSA and puzzles and questions from my resume

      Questions d'entretien [1]

      Question 1

      find the loop in the linked list
      Répondre à cette question

      Entretien pour Associate Engineer

      29 oct. 2024
      Candidat à l'entretien anonyme
      Bangalore Rural
      Aucune offre
      Expérience positive
      Entretien difficile

      Candidature

      J'ai postulé via un établissement d'enseignement supérieur ou universitaire. Le processus a pris 4 semaines. J'ai passé un entretien chez Qualcomm (Bangalore Rural) en août 2024

      Entretien

      The questions was mainly on data structure , c , c++. The interview was conducted virtually and had kore than 3 rounds of interview. The job role was associate engineer. Questions related to embeeded were also asked

      Questions d'entretien [1]

      Question 1

      Mainly from data structure Coding questions related to ds
      Répondre à cette question

      Entretien pour Associate Engineer

      8 août 2024
      Candidat à l'entretien anonyme
      Coimbatore
      Aucune offre
      Expérience négative
      Entretien moyen

      Candidature

      J'ai postulé via un établissement d'enseignement supérieur ou universitaire. Le processus a pris 1 semaine. J'ai passé un entretien chez Qualcomm (Coimbatore) en juill. 2024

      Entretien

      Applied through campus recruitment in the month of July. First round is technical online and then followed by two rounds of virtual technical round with the managers. Selected in online test as one of the 18 candidates for the digital role. But not shortlisted after the first virtual round.

      Questions d'entretien [1]

      Question 1

      What is the structure of UVM, mention about the phases in UVM and also about factory registration?
      Répondre à cette question
      3