Le processus a pris 1 jour. J'ai passé un entretien chez Qualcomm (San Diego, CA) en oct. 2011
Entretien
One phone interview firstly, then onsite interview with 7 persons. The questions include using MUX to design logic gates, verification problems, coding with Verilog and C and DSP.
Sometimes I don't need to write the complete code, just describe my idea. As a big company, they requires more and some of the questions are difficult. But as a PhD, I don't think it is a good way to ask me so many general ASIC design questions. I can perform better in more specific professional questions in my research area.
J'ai postulé via la recommandation d'un employé. J'ai passé un entretien chez Qualcomm (Hod HaSharon) en mai 2026
Entretien
3-Stages,i only did the first one. they asked about grades,project i did, and asked my to explain and draw the design for my final project. after that, ive been asked a few questions.
It was on campus hiring. It consists of an online assessment and resume screening, followed by 3 rounds of interviews, out of which 2 were technical and 1 was HR.
J'ai postulé via un recruteur. J'ai passé un entretien chez Qualcomm (Hsinchu)
Entretien
The interview process spanned 4 days with one 1–2 hour session per day. Each round began with a 30-minute discussion on my college projects, followed by deep dives into Computer Architecture (CPU Design, Cache ＤDesign, etc.). One of the sessions also included a simple whiteboard coding question.
Questions d'entretien [1]
Question 1
Cache Design (calculating cache bits involves breaking down the CPU address into Tag, Index, and Offset field)