The interview was approximately 1 hour long. From the interview what I felt is that in ASIC design scripting is more required rather than having full knowledge of hardware. Because nowadays (from my interview experience), industry doesn't even use verilog. Everything is done via scripting.

4 interviews 1st was a 45 min interview, did not too much into coding. Other 3 happened in 1 day with 3 different engineers. A lot more RTL and test bench designs were asked and computer architecture concepts