J'ai postulé via un établissement d'enseignement supérieur ou universitaire. Le processus a pris 2 jours. J'ai passé un entretien chez NXP Semiconductors (New Delhi) en déc. 2018
Entretien
The company visited our college. The whole process consisted of 2 steps. First a pen paper test was conducted. It consisted of ques from both analog and digital. Digital( cmos digital circuits, sequential circuit design problems, verilog hdl) , analog( cmos differential amplifiers) and one problem on c. The first interview was technical in which understanding of basic concepts was tested. The second interview was an HR one.
Questions d'entretien [1]
Question 1
1 . Draw cmos inverter and its cross section.
2. Followup ques on cross section of inverter.
3. Some input and output waveforms were given and I was asked to design a sequential circuit for the same.....
4. Many more basic ques....
it was fairly easy, there were 2 rounds 1 online assesment and the other was interview OA was very good and the interviews were fairly simple. they asked a bunch of design problems coveres dome comp arch and at the end discussed about the role
Was een zeer aangename verrassing, de interviewers waren erg vriendelijk, alleen kan je wel pittige vragen verwachten afhankelijk van de interview nummer. Eveneens was de stemming prettig, ook al was ik wat vroeg kon ik zo aanschuiven
J'ai postulé via un établissement d'enseignement supérieur ou universitaire. J'ai passé un entretien chez NXP Semiconductors (Chennai) en août 2022
Entretien
Basic questions from the domain we feel confident and semiconductor physics with emphasis on fgpa and verilog too. 20 minutes difficulty level 7/10. Deep understanding of topics required. Cadence simulation design