J'ai postulé via une autre source. J'ai passé un entretien chez Cadence Design Systems en févr. 2023
Entretien
Two techincal round were supposed to be taken for the interview process. Unfortunately I didn't make to the first round itself. first round of interview was online. Second round was offline.
Questions d'entretien [1]
Question 1
Q1: What is CDC. Q2: Explain setup time and hold time. Q3: Some waveforms and we have to state whether the output is correct or not. Q4: Conversion Gray to binary. Q5: Equality and inequality operators(logical and case operator) Q6:What is FPGA? Expalin.
J'ai passé un entretien chez Cadence Design Systems
Entretien
Recruiter short listing followed by an online interview. Questions based clock domain crossing, reset domain crossing, asynchronous FIFO etc. Interviewer was very helpful throughout the interview discussion. Overall it was good experience and got to learn a lot