J'ai postulé via un établissement d'enseignement supérieur ou universitaire. J'ai passé un entretien chez Cadence Design Systems
Entretien
phone interview with a senior manager..was briefed on some of the technologies that CDS is working on. Later was asked some brief tech questions from circuit design, logic design fundamentals
Questions d'entretien [1]
Question 1
why does one use a header and not a footer for power gating
J'ai postulé via un recruteur. Le processus a pris 2 semaines. J'ai passé un entretien chez Cadence Design Systems (Belo Horizonte, ) en janv. 2022
Entretien
Interview with 7 people. Topics ranged from all disciplines of Hardware Design flow. Front-end, back-end and DFT. Questions were focused on tool usage, common issues found in my discipline and how I interacted with other teams.
Questions d'entretien [1]
Question 1
Create a script to obtain nth term separated by "abc" and "xyz" recurring tokens;
Describe challenges and approaches to DFT architecture regarding a certain type of chip;
Several questions regarding different needs for scan insertion, considering different frequencies in the same chain.
J'ai postulé via un établissement d'enseignement supérieur ou universitaire. Le processus a pris 3 semaines. J'ai passé un entretien chez Cadence Design Systems (San Jose, CA) en avr. 2015
Entretien
Easy, applied online and had one phone interview. Manager just asked me about my qualities I can contribute. Questioned a bit about my resume but that was about it. Very simple and great company to go for. Although much harder to get full time opportunity after