J'ai postulé via un établissement d'enseignement supérieur ou universitaire. Le processus a pris 4 mois. J'ai passé un entretien chez Synopsys en janv. 2025
Entretien
2 technical interviews that were very heavy on digital design logic and Verilog I was asked to write code for certain blocks as well it was difficult but the main objective was for them to see how I can figure out problems and get to a decent result
Questions d'entretien [1]
Question 1
What is the difference between setup and hold time